华硕上电图

19870415 · 发表于 2012-11-10 22:03:30

华硕上电图

华硕POWER 上电时序

AC_BAT_SYS

5VAO  +5VA

+3VAO  +3VA

+3VA_EC +3VACC +3VPLL

EC_RST# EC振荡

(EC芯片)VSUS_ON

+12VSUS

+3VSUS  +3VO

+5VSUS  +5VO

SUS_PWRGD

(EC芯片)PM_RSMRST#

PWR_SW#

(EC芯片)PM_PWRBTN#

(+3VSUS,+VCC_RTC,PM_RSMRST#,PM_PWRBTN#,南桥晶振) (SB)PM_SUSB#  PM_SUSC#

(EC芯片)SUSB_EC#

+3V +5V

+3VS  +5VS

(+5VO,SUSB#_PWR,SUSC#_PWR,AC_BAT_SYS)+1.8VO  +1.8V  +0.9VO  +0.9V" DDR_PWRGD

(+5VO,SUSB#_PWR,AC_BAT_SYS)+1.05VO  +VCCP  +1.5VO  +1.5VS% 1.05V_1.5V_PWRGD (SUS_PWRGD,DDR_PWRGD,1.05V_1.5V_PWRGD,PWR_OK_VGA)

ALL_SYSTEM_PWRGD

|(EC芯片)CPU_VRON

(CPU_VRON,+3VS,+5VS,AC_BAT_SYS)+VCORE

VRM_PWRGD(或CPU_PWRGD)

(VRM_PWRGD,ALL_SYSTEM_PWRGD)FORCE_OFF#--------------)

(VRM_PWRGD)(EC芯片)EC_CLK_EN

VR_PWRGD_CLKEN

(SB)CLK_PWRGD

(+3VS,CLK_PWRGD,晶振)各个芯片工作需要的时钟讯号

(CLK_KBC_PCI)(EC芯片)PM_PWROK

(PM_PWROK ,CLK_ICHPCI,CLK_ICH14)(SB)PLT_RST# PCI_RST#

H_PWRGD

(PM_PWROK,CLK_......,BUF_PLT_RST#)(NB)H_CPURST#

(H_CPURST#,H_PWRGD,+VCCP_CPU,CLK_......)(CPU)36条地址线(H_A#)  64条数据线(H_D#)